Description
4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA
Description:
The AD7192 is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta (S-?) analog-to digital converter (ADC). The on-chip low noise gain stage means that signals of small amplitude can be interfaced directly to the ADC. The device can be configured to have two differential inputs or four pseudo differential inputs. The on-chip channel sequencer allows several channels to be enabled, and the AD7192 sequentially converts on each enabled channel. This simplifies communication with the part. The on-chip 4.92 MHz clock can be used as the clock source to the ADC or, alternatively, an external clock or crystal can be used. The output data rate from the part can be varied from 4.7 Hz to 4.8 kHz. The device has two digital filter options. The choice of filter affects the rms noise/noise-free resolution at the programmed output data rate, the settling time, and the 50 Hz/60 Hz rejection. For applications that require all conversions to be settled, the AD7192 includes a zero latency feature. The part operates with a power supply from 3 V to 5.25 V. It consumes a current of 4.35 mA. It is housed in a 24-lead TSSOP package.
Features:
• RMS noise: 11 nV @ 4.7 Hz (gain = 128)
• 15.5 noise-free bits @ 2.4 kHz (gain = 128)
• Up to 22 noise-free bits (gain = 1)
• Offset drift: 5 nV/°C
• Gain drift: 1 ppm/°C
• Specified drift over time
• 2 differential/4 pseudo differential input channels
• Automatic channel sequencer
• Programmable gain (1 to 128)
• Output data rate: 4.7 Hz to 4.8 kHz
• Internal or external clock
• Simultaneous 50 Hz/60 Hz rejection
• 4 general-purpose digital outputs
• Power supply:
- AVdd: 3 V to 5.25 V
- DVdd: 2.7 V to 5.25 V
• Current: 4.35 mA
• Temperature range: –40°C to +105°C
• Package: 24-lead TSSOP
Interface:
• 3-wire serial
• SPI, QSPI™, MICROWIRE™, and DSP compatible
• Schmitttrigger on SCLK
